EP2SGX30DF780C5N vs EP2SGX30DF780I4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX30DF780C5N sa pamamagitan ng Intel at EP2SGX30DF780I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2SGX30DF780C5N - Stratix II GX FPGA, 33.88k LE, 780-FBGA | Intel
EP2SGX30DF780C5N ⚠ Huling PagbiliIntel
EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel
EP2SGX30DF780I4 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2SGX30DF780C5N | EP2SGX30DF780I4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Series | Stratix® II GX | Stratix II GX |
| Family Name | Stratix II GX | — |
| Logic Elements / Cells | 33,880 | 33,880 |
| LABs / CLBs | 1,694 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| User I/O Count | 361 | 361 |
| Package Type | FC-FBGA-780 | — |
| Package Size | 29 mm x 29 mm | — |
| Ball Pitch | 1.0 mm | — |
| Temperature na Operasyon | -40°C to +85°C (extended commercial) | -40C to +85C (Industrial) |
| Core Voltage | 1.2 V | — |
| Internal Frequency (max) | 622 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Tindminan RoHS | Compliant (lead-free finish) | [DATA_NEEDED: RoHS status] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Flip-chip BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Speed Grade | C5 | — |
| Design Tool | Quartus II | — |
| Family | — | Stratix II GX |
| Number of LABs | — | 1,694 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Nominal Supply Voltage (Core) | — | 1.2 V |
| Internal Operating Frequency | — | 622 MHz |
| Maksimum na Taktiko ng Oras | — | 717 MHz |
| Packhaging | — | 780-ball FC-FBGA, 29x29 mm, 1 mm pitch |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Number of Transceivers | — | [DATA_NEEDED: number of transceiver channels] |
| Number of PLLs / DLLs | — | [DATA_NEEDED: number of PLLs] |