EP2SGX30DF780I4 vs EP2SGX30DF780C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX30DF780I4 sa pamamagitan ng Intel at EP2SGX30DF780C7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel
EP2SGX30DF780I4 ⚠ Huling PagbiliIntel
EP2SGX30DF780C7 - Stratix II GX FPGA 33.7K LE | Intel (Altera) | 780-BGA
EP2SGX30DF780C7 ObsoletePagsanggunian na paghahambing
| Parametro | EP2SGX30DF780I4 | EP2SGX30DF780C7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | Stratix II GX | Stratix II GX |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements / Cells | 33,880 | — |
| Total RAM Bits | 1,369,728 | — |
| Number of LABs | 1,694 | — |
| User I/O Count | 361 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Nominal Supply Voltage (Core) | 1.2 V | — |
| Internal Operating Frequency | 622 MHz | — |
| Maksimum na Taktiko ng Oras | 717 MHz | — |
| Process Technology | 90 nm CMOS | — |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0C to +85C (Commercial) |
| Packhaging | 780-ball FC-FBGA, 29x29 mm, 1 mm pitch | 780-Ball FBGA (DF780), 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount (Flip-chip BGA) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Number of Transceivers | [DATA_NEEDED: number of transceiver channels] | — |
| Number of PLLs / DLLs | [DATA_NEEDED: number of PLLs] | — |
| Logic Elements (LE) | — | 33,880 |
| Embedded Memory (bits) | — | 1,369,728 |
| Memory Blocks | — | 482 (M512/M4K/M-RAM) |
| DSP Blocks | — | 24 |
| 18x18 Multipliers | — | 192 |
| Maximum User I/O | — | 361 |
| Speed Grade | — | -7 |
| Process Node | — | 90 nm |
| Core Voltage (VCCINT) | — | 1.2 V (typ) |
| Configuration | — | PS / FPP / JTAG |
| Transceiver Data Rate | — | [DATA_NEEDED: SERDES data rate] |