EP3C5E144I7N vs EP3C5E144C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C5E144I7N sa pamamagitan ng Intel at EP3C5E144C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C5E144I7N | EP3C5E144C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone III | — |
| Logic Elements (LE) | 5,136 | 5,136 |
| Embedded Memory Bits | 423,936 | — |
| Embedded 18x18 Multipliers | 23 | 46 |
| PLLs | 4 | 4 |
| Maximum User I/O Pins | 94 | — |
| Core Voltage | 1.2 V | — |
| Maximum Internal Clock Frequency | 437.5 MHz | — |
| Process Technology | 60 nm low-k | TSMC 65 nm low-power |
| Packhaging | 144-pin EQFP (Enhanced QFP) with exposed pad | 144-LQFP Exposed Pad (EQFP-144), 22x22 mm, 0.5 mm pitch |
| Package Dimensions | 20 mm x 20 mm, 0.4 mm pitch | — |
| Temperature na Operasyon | -40 °C to +100 °C (industrial) | — |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial, active serial | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Compliant | Compliant |
| Device Family | — | Cyclone III |
| Logic Array Blocks (LAB) | — | 290 |
| Total Memory Bits | — | 423,936 |
| Embedded M9K Memory Blocks | — | 46 |
| User I/Os | — | 94 |
| Speed Grade | — | C7 (7 ns delay) |
| Temperature ng Junction na Operasyon | — | 0C to +85C |
| Configuration Modes | — | AS, PS, FPP, JTAG |
| I/O Standards | — | LVDS, SSTL, HSTL, LVCMOS, PCI/PCI-X |