EP3C80F484C6N vs EP3C80F484C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C80F484C6N sa pamamagitan ng Altera at EP3C80F484C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C80F484C6N | EP3C80F484C7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Unknown |
| Series | Cyclone III | — |
| Family | Cyclone III FPGA (Low Power) | Cyclone III |
| Logic Elements (LE) | 81,264 | — |
| Embedded Memory Bits | 2,810,880 (4 Mbits) | — |
| Maximum User I/O | 295 | — |
| Packhaging | 484-ball FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch | 484-BGA |
| Uri ng Pagpapasok | Surface Mount (SMT) | Surface Mount |
| Number of PLLs | 4 | — |
| Number of Global Clock Networks | 20 | — |
| Embedded 18x18 Multipliers | 244 | — |
| Process Technology | 65 nm TSMC low-power CMOS | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| I/O Voltage (VCCIO) | 1.2V / 1.5V / 1.8V / 2.5V / 3.3V (per-bank) | — |
| Temperature na Operasyon | 0C to +85C (Commercial, 'C' speed grade) | — |
| Speed Grade | 6 (medium speed bin) | — |
| Configuration Scheme | Active Serial (AS), Passive Serial (PS), JTAG, Fast Passive Parallel (FPP) | — |
| Tindminan RoHS | Compliant (Pb-free) | [DATA_NEEDED: RoHS status] |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Logic Cells | — | 81264 cells |
| Memory | — | 2810880 bit |
| User I/O | — | 295 I/O |
| Logic Array Blocks | — | 5079 LABs |
| Technology | — | 65 nm |
| Stated Frequency | — | 437.5 MHz |
| Volte ng Pagbibigay | — | 1.2 V |
| Bilang ng Pin | — | 484 pins |
| Configuration | — | FPGA programmable after assembly |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |