EP3CLS70F484I7N vs EP3CLS70F484C8N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3CLS70F484I7N sa pamamagitan ng Intel at EP3CLS70F484C8N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3CLS70F484I7N - Cyclone III LS FPGA, 70K LEs, 484-FBGA | Intel
EP3CLS70F484I7N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3CLS70F484I7N | EP3CLS70F484C8N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | Cyclone III LS | Cyclone III LS |
| Logic Elements (LEs) | 70,208 | — |
| Embedded Memory Bits | 3,068,928 bits | 3,068,928 bits (approx. 2,997 Kbit) |
| User I/Os | 278 | — |
| DSP Blocks (18x18 Multipliers) | 274 | 247 |
| PLLs | 4 | — |
| Maximum User I/O Pins | 294 | — |
| Process Technology | 65 nm low-power CMOS | 65 nm TSMC low-power |
| Core Supply Voltage | 1.2 V | 1.2 V |
| Packhaging | 484-ball FBGA (FineLine BGA), 1.0 mm pitch | 484-ball FBGA (FineLine BGA), 23x23 mm |
| Temperature na Operasyon | -40C to +100C (Industrial, I7 speed grade) | Commercial 0C to +85C (C8 grade) |
| Configuration Mode | Passive Serial, Active Serial, JTAG | — |
| Memory Interfaces | DDR2, DDR3, QDRII+, RLDRAM II | — |
| LVDS Data Rate | Up to 875 Mbps per channel | — |
| Tindminan RoHS | Compliant | Compliant |
| Device Logic Elements (LEs) | — | 70,208 |
| Logic Array Blocks (LABs) | — | 4,388 |
| Maximum User I/Os | — | 278 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Global Clock Networks | — | 20 |
| Speed Grade | — | 8 (slowest commercial) |
| Configuration Modes | — | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |
| Bitstream Encryption | — | AES-256 (LS family feature) |