EP3SE260H780C2N vs EP3SE260H780C4LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260H780C2N sa pamamagitan ng Intel at EP3SE260H780C4LG sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE260H780C2N - Stratix III E FPGA 255K LE, 780-BGA | Intel
EP3SE260H780C2N ⚠ Huling PagbiliAltera
EP3SE260H780C4LG - Stratix III E FPGA, 488 I/O, 780-HBGA | Altera
EP3SE260H780C4LG ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP3SE260H780C2N | EP3SE260H780C4LG |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Series | Stratix III E | — |
| Logic Elements | 255,000 | 254,400 |
| LABs / CLBs | 10,200 | — |
| Total RAM Bits | 16,672,768 | — |
| User I/O Count | 488 | — |
| Number of Transceivers | [DATA_NEEDED: transceiver count] | — |
| Core Voltage | 0.9 V | — |
| Packhaging | 780-BGA FCBGA | 780-ball FineLine BGA (HBGA, 29 mm x 29 mm, 1.0 mm pitch) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Hanay ng Temperature na Operasyon | Commercial (0C to +85C) | — |
| Speed Grade | C2 | C4 (commercial, mid-speed tier) |
| Level ng MSL | 3 (168 hours) | 3 (per JEDEC J-STD-020) |
| Reflow Peak Time Max | 40 s | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant (Pb-free HBGA) |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| Number of Terminals | 780 | — |
| Process Node | 40 nm | — |
| Family | — | Stratix III Enhanced (EP3SE) |
| Adaptive Logic Modules (ALMs) | — | 101,760 |
| Embedded Memory (M9K + M144K) | — | 18.36 Mbits |
| DSP Blocks (18-bit x 18-bit) | — | 768 |
| 18-bit x 18-bit Multipliers | — | 1,536 |
| Transceivers (full-duplex) | — | 8 (up to 6.375 Gbps) |
| Maximum User I/O Pins | — | 488 |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Process Technology | — | 65 nm TSMC low-power CMOS |
| Operating Voltage (Core) | — | 0.9 V / 1.0 V / 1.1 V (programmable) |
| External Memory Interface | — | Up to 800 Mbps DDR3, QDR II+, RLDRAM II |
| Hard IP Blocks | — | PCIe Gen2, 10GbE MAC, memory controllers |