EP3SL110F1152I3N vs EP3SL50F484I4LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL110F1152I3N sa pamamagitan ng Altera at EP3SL50F484I4LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP3SL110F1152I3N - Stratix III L FPGA, 107.5K LE, 1152-BGA | Altera
EP3SL110F1152I3N ⚠ Huling PagbiliIntel
EP3SL50F484I4LG - Stratix III L FPGA, 47.5K LE, 484-FCBGA | Altera (Intel)
EP3SL50F484I4LG NrndPagsanggunian na paghahambing
| Parametro | EP3SL110F1152I3N | EP3SL50F484I4LG |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Stratix III L | Stratix III L |
| Logic Elements | 107,500 | 47,500 |
| Logic Array Blocks (LABs) | 4,300 | — |
| User I/Os | 744 | 296 |
| Embedded Memory Bits | 4,992,000 | — |
| Process Technology | 65 nm | — |
| Core Voltage | 1.1 V | — |
| Maximum Operating Frequency | 500 MHz | — |
| Packhaging | 1152-ball FC-FBGA | 484-Ball FCBGA (FBGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Configuration Interface | JTAG, Passive Serial, Fast Passive Parallel | JTAG / Passive Serial / Fast Passive Parallel |
| Speed Grade | I3 | I4 (fast) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | EP3SL50 |
| Embedded Memory | — | 2,184,192 bits (273 KB) |
| Volte ng Pagbibigay | — | 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail) |
| Process Node | — | 40 nm |
| Lead-Free | — | Yes |
| Total I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | [DATA_NEEDED: transceiver channel count] |
| Configuration Memory | — | SRAM-based |