EP3SL110F1152I3N vs EP3SL50F484I4LG 比較
詳細並排比較 EP3SL110F1152I3N 由 Altera 與 EP3SL50F484I4LG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP3SL110F1152I3N - Stratix III L FPGA, 107.5K LE, 1152-BGA | Altera
EP3SL110F1152I3N ⚠ 最後購買機會Intel
EP3SL50F484I4LG - Stratix III L FPGA, 47.5K LE, 484-FCBGA | Altera (Intel)
EP3SL50F484I4LG Nrnd規格比較
| 參數 | EP3SL110F1152I3N | EP3SL50F484I4LG |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | NRND |
| Family | Stratix III L | Stratix III L |
| Logic Elements | 107,500 | 47,500 |
| Logic Array Blocks (LABs) | 4,300 | — |
| User I/Os | 744 | 296 |
| Embedded Memory Bits | 4,992,000 | — |
| Process Technology | 65 nm | — |
| Core Voltage | 1.1 V | — |
| Maximum Operating Frequency | 500 MHz | — |
| 封裝 | 1152-ball FC-FBGA | 484-Ball FCBGA (FBGA) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Configuration Interface | JTAG, Passive Serial, Fast Passive Parallel | JTAG / Passive Serial / Fast Passive Parallel |
| Speed Grade | I3 | I4 (fast) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Series | — | EP3SL50 |
| Embedded Memory | — | 2,184,192 bits (273 KB) |
| 供應電壓 | — | 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail) |
| Process Node | — | 40 nm |
| Lead-Free | — | Yes |
| Total I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | [DATA_NEEDED: transceiver channel count] |
| Configuration Memory | — | SRAM-based |