EP3SL200H780C3N vs EP3SL200H780C4LN Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL200H780C3N sa pamamagitan ng Intel at EP3SL200H780C4LN sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EP3SL200H780C4LN EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN - Stratix III L 200K Logic Element FPGA | Intel

EP3SL200H780C4LN ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EP3SL200H780C3N EP3SL200H780C4LN
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Family Stratix III L (low-power) —
Process Node 40 nm —
Logic Elements 200,000 200,000
Embedded Memory Bits 10,901,504 bits —
Logic Array Blocks (LABs) 8,000 8,000
User I/Os 488 488
Packhaging 780-Ball FCBGA (HBGA), 29 x 29 mm 780-BBGA / HBGA / FCBGA
Uri ng Pagpapasok Surface Mount Surface Mount
Maximum Internal Clock Frequency 800 MHz —
Transceivers 24 channels, up to 3.75 Gbps Multi-quad, up to 6.375 Gbps
DSP Blocks 384 —
Speed Grade C3 (commercial, -3 speed) 4 (commercial, slowest of grade 4)
Temperature na Operasyon 0C to +85C (commercial) 0 C to +70 C (commercial, 'C' grade)
Voltage - Core 0.9 V / 1.0 V (core, VCC) —
Voltage - I/O 1.2 V to 3.3 V (VCCIO banks) —
Level ng MSL 3 —
Lead-Free / RoHS Yes —
Mounting Pitch 1.0 mm ball pitch —
PLLs 12 (Stratix III PLL array) 8
Configuration JTAG IEEE Std 1149.1, passive/active serial JTAG / Passive Serial / Fast Passive Parallel
Series — Stratix III L
Total Memory Bits — 10,901,504
Bilang ng Pins — 780
Core Supply Voltage — 0.86 V to 1.15 V
DSP Blocks (18x18 multipliers) — [DATA_NEEDED: exact multiplier count]
Tindminan RoHS — Compliant
Lead-Free — Yes

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita