EP3SL340H1152I4 vs EP3SL340H1152C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL340H1152I4 sa pamamagitan ng Intel at EP3SL340H1152C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SL340H1152C4N - 340K LE Stratix III L FPGA, 1152-BGA | Intel
EP3SL340H1152C4N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SL340H1152I4 | EP3SL340H1152C4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Series | Stratix III L | — |
| Logic Elements (LE) | 337,500 | — |
| Embedded Memory | 18,821,440 bits | — |
| User I/O Pins | 744 | — |
| Logic Array Blocks (LABs) | 13,500 | 13,500 |
| Operating Frequency | 717 MHz (max fabric speed) | — |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Core Voltage | 1.1 V | 1.1 V |
| Packhaging | 1152-ball FCBGA / HBGA | 1152-ball FCBGA (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial (I4: -40C to +100C junction) | — |
| I/O Standards Supported | LVDS, LVPECL, HSTL, SSTL, LVCMOS, LVTTL | — |
| Memory Interface Hard IP | DDR / DDR2 / DDR3 SDRAM controllers with PHY | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| Family | — | Stratix III L |
| Logic Elements | — | 337,500 |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory Bits | — | 18,821,144 |
| Embedded Multiplier Blocks | — | [DATA_NEEDED: 18x18 multiplier count] |
| User I/Os | — | 744 |
| Maximum Internal Frequency | — | 800 MHz (data); 500 MHz (logic) |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| Speed Grade | — | 4 |
| Configuration Methods | — | Passive Serial, Fast Passive Parallel, Active Serial |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |