EP3SL50F780C3N vs EP3SL50F780C2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780C3N sa pamamagitan ng Altera at EP3SL50F780C2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SL50F780C3N | EP3SL50F780C2 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | Stratix III L (low-power sub-family) | Stratix III L |
| Series | EP3SL50 | — |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Logic Elements | 47,500 | — |
| Number of LABs/CLBs | 1900 | — |
| Total RAM Bits | 2,184,192 | — |
| Number of I/Os | 488 | — |
| Bilang ng Outputs | 488 | — |
| Maximum Internal Frequency | 500 MHz | — |
| Process Technology | 65 nm | 65 nm |
| Core Supply Voltage | 1.1 V | — |
| Packhaging | 780-BBGA, FCBGA (Flip-Chip FBGA) | 780-ball FCBGA (Flip-Chip BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0°C to +85°C (commercial) |
| Tindminan RoHS | Compliant | Compliant |
| Logic Elements (LE) | — | 47,500 |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Memory (bits) | — | 2,184,192 |
| Maximum User I/Os | — | 488 |
| Core Voltage | — | 1.1 V |
| Maximum Core Frequency | — | 600 MHz |
| Configuration Interface | — | JTAG / passive serial / fast passive parallel |
| I/O Standards | — | LVDS, LVCMOS, SSTL, HSTL, DDR2/DDR3 memory interfaces |
| Embedded Memory Type | — | TriMatrix (MLAB, M9K, M144K blocks) |