EP3SL50F780C3N vs EP3SL50F780C2 比較
詳細並排比較 EP3SL50F780C3N 由 Altera 與 EP3SL50F780C2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SL50F780C3N | EP3SL50F780C2 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | Stratix III L (low-power sub-family) | Stratix III L |
| Series | EP3SL50 | — |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Logic Elements | 47,500 | — |
| Number of LABs/CLBs | 1900 | — |
| Total RAM Bits | 2,184,192 | — |
| Number of I/Os | 488 | — |
| 輸出數量 | 488 | — |
| Maximum Internal Frequency | 500 MHz | — |
| Process Technology | 65 nm | 65 nm |
| Core Supply Voltage | 1.1 V | — |
| 封裝 | 780-BBGA, FCBGA (Flip-Chip FBGA) | 780-ball FCBGA (Flip-Chip BGA) |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度 | 0C to +85C (Commercial) | 0°C to +85°C (commercial) |
| RoHS 狀態 | Compliant | Compliant |
| Logic Elements (LE) | — | 47,500 |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Memory (bits) | — | 2,184,192 |
| Maximum User I/Os | — | 488 |
| Core Voltage | — | 1.1 V |
| Maximum Core Frequency | — | 600 MHz |
| Configuration Interface | — | JTAG / passive serial / fast passive parallel |
| I/O Standards | — | LVDS, LVCMOS, SSTL, HSTL, DDR2/DDR3 memory interfaces |
| Embedded Memory Type | — | TriMatrix (MLAB, M9K, M144K blocks) |