EP3SL50F780I3N vs EP3SL50F780I3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780I3N sa pamamagitan ng Altera at EP3SL50F780I3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP3SL50F780I3N - Stratix III L FPGA, 47.5K LE, FBGA-780 | Intel
EP3SL50F780I3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SL50F780I3N | EP3SL50F780I3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Series | Stratix III L | Stratix III L |
| Logic Elements | 47,500 | 47,500 |
| Number of LABs | 1,900 | — |
| Embedded Memory Bits | 2,184,192 bits | — |
| Maximum User I/O | 488 | — |
| Operating Frequency (max) | 500 MHz | — |
| Process Technology | 65 nm CMOS | 65 nm |
| Core Supply Voltage | 1.1 V | — |
| Speed Grade | -3 | I3 (industrial, third-fastest bin) |
| Packhaging | 780-ball FC-FBGA (Flip-Chip BGA) | 780-ball FC-FBGA (FineLine BGA), 1 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | -40C to +100C (industrial) | -40C to +100C (industrial) |
| JTAG Support | IEEE Std 1149.1 Boundary-Scan | — |
| Tindminan RoHS | Compliant (LEAD FREE) | Compliant |
| Configuration Method | JTAG / Serial / Passive / Active | — |
| Logic Array Blocks (LABs) | — | 1,900 |
| User I/O Pins | — | 488 |
| Total Memory Bits | — | 2,106 Kbit (M9K + M144K) |
| Transceiver Channels | — | 16 (up to 3.75 Gbps) + 8 (up to 6.5 Gbps) |
| Core Voltage | — | Selectable 1.1 V / 0.9 V |
| Lead Free | — | Yes |
| Vertical Migration | — | Drop-in to EP3SL70 in 780-FBGA package |