EP4CGX50DF27C8N vs EP4CGX50DF27I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4CGX50DF27C8N sa pamamagitan ng Intel at EP4CGX50DF27I7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP4CGX50DF27C8N | EP4CGX50DF27I7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Cyclone IV GX | — |
| Family | Cyclone IV GX | Cyclone IV GX |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Logic Elements | 49,888 | 49,888 LE |
| Embedded Memory | 2,562,048 bits (M9K blocks) | 2,562,048 bits (2.44 Mbit) / 250 M9K blocks of 9 Kbit |
| Maximum User I/O | 310 | — |
| Package Type | FBGA-672 (672-ball Fine-pitch BGA) | — |
| Pin/Package Pitch | [DATA_NEEDED: BGA ball pitch] | — |
| Core Voltage | 1.2 V | — |
| Supply Voltage (datasheet range) | 1.2 V core | — |
| Speed Grade | 8 (faster performance bin) | — |
| Temperature Grade | C (commercial, 0 C to +85 C) | — |
| Transceivers | Up to 8 channels, up to 3.125 Gbps | — |
| Embedded Multipliers | 18x18 multipliers | — |
| PLLs | 4 | — |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Temperature na Operasyon | 0 C to +85 C (commercial) | -40 C to +100 C (industrial I7 grade) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Number of LABs/CLBs | — | 3,118 |
| Embedded 18x18 Multipliers | — | 56 |
| User I/Os | — | 310 |
| Number of Transceivers | — | 8 (up to 3.125 Gbps) |
| PCIe Hard IP | — | 1 Gen1 controller (x1/x2/x4) |
| Process Technology | — | 60 nm |
| Core Supply Voltage | — | 1.2 V |
| Packhaging | — | 672-ball FBGA (F27, 27x27 mm, 1.0 mm pitch) |
| Configuration Method | — | SRAM-based, JTAG/AS/PS |