EP610IDC-10 vs EP610ILI-12 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610IDC-10 sa pamamagitan ng Intel at EP610ILI-12 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP610IDC-10 EP610ILI-12
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Device Family Altera Classic EPLD —
Logic Capacity 300 usable gates —
Macrocell Count 16 macrocells —
Pin-to-Pin Logic Delay (tpd) 10 ns —
Maximum Counter Frequency (fCNT) 100 MHz —
Supply Voltage (VCC) 5 V (nominal) —
I/O Logic Compatibility 100% TTL emulation —
Technology CMOS, UV-erasable (windowed ceramic) CMOS EPROM
Package Type 24-pin Ceramic DIP (CDIP) —
Dedicated Inputs 4 4
I/O Pins 20 —
Hanay ng Temperature na Operasyon 0 °C to +70 °C (commercial) —
Programmable Interconnect Yes (on-chip) —
In-System Programmability Yes (via MAX+PLUS II) —
Boundary-Scan Test Yes (per device documentation) —
Tindminan RoHS [DATA_NEEDED: RoHS status of CDIP-10 variant] [DATA_NEEDED: RoHS status]
Uri ng Pagpapasok Through-hole Surface Mount
Family — Classic EPLD (EP610)
Usable Gates — 300
Macro Cells — 16
Speed Grade (tpd) — 12 ns
Supply Voltage (Vcc) — 5 V (4.75 V to 5.25 V)
Supply Voltage (Vpp) — [DATA_NEEDED: Vpp programming voltage]
Operating Frequency (max) — 83.3 MHz
Logic Elements — [DATA_NEEDED: exact LE count]
User I/O Pins — [DATA_NEEDED: I/O pin count]
Temperature na Operasyon — -40C to +85C (industrial grade)
Packhaging — 28-pin PLCC (J-Lead)
Programmable Security Bit — Yes
TTL Compatibility — 100 TTL emulation
Level ng MSL — [DATA_NEEDED: MSL rating]

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