EP610IPC-25 vs EP610PC-25T Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610IPC-25 sa pamamagitan ng Intel at EP610PC-25T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP610IPC-25 EP610PC-25T
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Family Classic EPLD (EP610) —
Architecture PAL-type, CMOS, Erasable —
Propagation Delay (tpd) 25 ns (max) —
Supply Voltage (VCC) 4.75 V to 5.25 V 5 V
Maximum Inputs 20 —
Maximum I/O Pins 16 —
Dedicated Outputs 16 —
Product Terms 160 —
Temperature na Operasyon 0 °C to +70 °C (Commercial) 0 °C to +70 °C (commercial)
Packhaging 24-pin PDIP (Plastic DIP) PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing)
Technology CMOS, UV-erasable (windowless in IPC pkg) —
TTL Compatibility 100% TTL emulation —
Uri ng Pagpapasok Through-Hole Through-hole
Level ng MSL [DATA_NEEDED: MSL level] —
Tindminan RoHS Non-compliant (contains Pb, PDIP package) [DATA_NEEDED: RoHS status]
Logic Capacity Equivalent to ~24 standard 24-pin PALs 300 usable gates
Manufacturer — Intel (formerly Altera)
Distributor / Stocking Source — Rochester Electronics, LLC
Device Family — Altera Classic EPLD - EP610
Device Type — Erasable Programmable Logic Device (EPLD, OTP for plastic package)
Macro Cells — 16
Registers — 16
User I/Os — 16
Propagation Delay (tPD) — 25 ns (speed grade 25)
Maximum Toggle Frequency — [DATA_NEEDED: max fmax]
Pipelined Data Rate — up to 100 MHz
Process Technology — ECMOS (CMOS, EPROM-based)
Pinout Compatibility — Pin-compatible with EP610DC-25 (CERDIP-24, windowed)
Programming Method — OTP (one-time programmable) via Altera programming hardware
Shipping Form (T suffix) — Tube

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