EP610PC-20 vs EP610PC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC-20 sa pamamagitan ng Altera at EP610PC-35 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester
EP610PC-35 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP610PC-20 | EP610PC-35 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | Classic EPLD | Classic EPLD |
| Logic Elements | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 20 ns | 37 ns (max, -35 speed grade) |
| Maximum Operating Frequency | 100 MHz (pipelined) | — |
| Supply Voltage (VCC) | 5 V ±10% | 4.75 V to 5.25 V (5 V nominal) |
| Bilang ng Pins | 24 | — |
| Packhaging | PDIP-24 | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Process Technology | CMOS EPROM | — |
| Programmable Flip-Flops | 16 | — |
| Input Pins | 24 | — |
| Output Pins | 16 | — |
| I/O Compatibility | TTL | — |
| Program/Erase Method | UV (windowed) or OTP | — |
| Tindminan RoHS | Non-compliant (legacy PDIP) | [DATA_NEEDED: RoHS status - not confirmed in provided data] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 16 |
| Internal Counter Frequency | — | up to 100 MHz |
| Supply Voltage - Internal | — | 4.75 V to 5.25 V |
| Programmable Type | — | EPLD (UV-erasable window variant: EP610DC; plastic OTP) |
| Uri ng Pagpapasok | — | Through Hole |
| Supplier Device Package | — | 24-PDIP |
| Logic Family | — | CMOS |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |