EP610PC-25 vs EP610PC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC-25 sa pamamagitan ng Altera at EP610PC-35 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester
EP610PC-35 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP610PC-25 | EP610PC-35 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Device Family | Classic EPLD (EP610 series) | — |
| Macro Cells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tpd) | 25 ns | — |
| Maximum Pipelined Data Rate | 100 MHz | — |
| Supply Voltage (Vcc) | 5 V (nominal) | — |
| Technology | CMOS, EPROM (UV-erasable) | — |
| Device Type | OT PLD, PAL-type, CMOS | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | 4 | — |
| I/O Pins | 20 (bidirectional, JTAG-programmable OE per macrocell) | — |
| Packhaging | PDIP-24 (0.3 inch, through-hole) | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | 0C to +70C (commercial) |
| Programming Method | EPROM (UV-erasable), via Altera programming hardware | — |
| Uri ng Pagpapasok | Through-Hole (DIP) | Through Hole |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - not confirmed in provided data] |
| Family | — | Classic EPLD |
| Macrocells | — | 16 |
| Propagation Delay (tPD) | — | 37 ns (max, -35 speed grade) |
| Internal Counter Frequency | — | up to 100 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Supply Voltage - Internal | — | 4.75 V to 5.25 V |
| Programmable Type | — | EPLD (UV-erasable window variant: EP610DC; plastic OTP) |
| Supplier Device Package | — | 24-PDIP |
| Logic Family | — | CMOS |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |