EP610PC-30 vs EP610PC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC-30 sa pamamagitan ng Altera at EP610PC-35 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester
EP610PC-35 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP610PC-30 | EP610PC-35 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Device Family | Classic EPLD (EP610) | — |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 30 ns | 37 ns (max, -35 speed grade) |
| Maximum Pipeline Frequency | 33.3 MHz (typical) / 100 MHz pipelined | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 4.75 V to 5.25 V (5 V nominal) |
| Process Technology | CMOS EPROM | — |
| Packhaging | 24-pin PDIP (0.300 inch) | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) |
| Uri ng Pagpapasok | Through-Hole | Through Hole |
| Programmability | One-Time Programmable (OTP, no window on plastic PDIP) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Output Drive Current | [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] | — |
| Input Pins (Dedicated) | [DATA_NEEDED: dedicated input count from datasheet pinout] | — |
| I/O Pins | [DATA_NEEDED: bidirectional I/O count from datasheet pinout] | — |
| Programming Tool | Altera A+PLUS / MAX+PLUS II (legacy) | — |
| Tindminan RoHS | Not applicable (legacy non-compliant package per distributor listing) | [DATA_NEEDED: RoHS status - not confirmed in provided data] |
| Lead Free Status | Not applicable | — |
| Current Distributor | Rochester Electronics, LLC (authorized continuing source) | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Classic EPLD |
| Internal Counter Frequency | — | up to 100 MHz |
| Supply Voltage - Internal | — | 4.75 V to 5.25 V |
| Programmable Type | — | EPLD (UV-erasable window variant: EP610DC; plastic OTP) |
| Supplier Device Package | — | 24-PDIP |
| Logic Family | — | CMOS |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |