EP610PC-30 vs EP610PC25 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC-30 sa pamamagitan ng Altera at EP610PC25 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP610PC-30 EP610PC25
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Device Family Classic EPLD (EP610) Altera Classic EPLD
Macrocells 16 16
Usable Gates 300 300
Propagation Delay (tPD) 30 ns 25 ns
Maximum Pipeline Frequency 33.3 MHz (typical) / 100 MHz pipelined —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) 5 V
Process Technology CMOS EPROM —
Packhaging 24-pin PDIP (0.300 inch) PDIP-24
Uri ng Pagpapasok Through-Hole Through-Hole
Programmability One-Time Programmable (OTP, no window on plastic PDIP) One-Time-Programmable (OTP), UV-erasable variant exists
Temperature na Operasyon 0C to +70C (commercial) 0C to +70C (commercial)
Output Drive Current [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] —
Input Pins (Dedicated) [DATA_NEEDED: dedicated input count from datasheet pinout] —
I/O Pins [DATA_NEEDED: bidirectional I/O count from datasheet pinout] —
Programming Tool Altera A+PLUS / MAX+PLUS II (legacy) —
Tindminan RoHS Not applicable (legacy non-compliant package per distributor listing) unknown
Lead Free Status Not applicable —
Current Distributor Rochester Electronics, LLC (authorized continuing source) —
Logic Type — EPLD (Erasable Programmable Logic Device)
Pipelined Data Rate — Up to 100 MHz
Programming Voltage (VPP) — 12 V
ICC (typical) — 200 mA
Bilang ng Pin — 24
Technology — 5 V CMOS
Lifecycle — Obsolete (last shipped ~2000s)

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