EP610PC30 vs EP610PC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC30 sa pamamagitan ng Altera at EP610PC-25 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP610PC30 | EP610PC-25 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Device Type | EPLD (Erasable Programmable Logic Device) | OT PLD, PAL-type, CMOS |
| Family | Classic EP610 | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Toggle Frequency | 33.3 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS | CMOS, EPROM (UV-erasable) |
| Packhaging | PDIP-24 | PDIP-24 (0.3 inch, through-hole) |
| Uri ng Pagpapasok | Through-Hole | Through-Hole (DIP) |
| Programming | EPROM/EEPROM-based, MAX+plus II toolchain | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature grade] |
| Tindminan RoHS | Not applicable (legacy through-hole, contains Pb per historical datasheet) | [DATA_NEEDED: RoHS status] |
| Logic Capacity | 16 macrocells / 300 gates equivalent | — |
| Configuration Memory | Non-volatile (UV-erasable or OTP variant) | — |
| Manufacturer (Original) | Altera Corporation (now Intel FPGA) | — |
| Current Distributor | Rochester Electronics, LLC | — |
| Device Family | — | Classic EPLD (EP610 series) |
| Macro Cells | — | 16 |
| Propagation Delay (tpd) | — | 25 ns |
| Maximum Pipelined Data Rate | — | 100 MHz |
| Supply Voltage (Vcc) | — | 5 V (nominal) |
| Dedicated Inputs | — | 4 |
| I/O Pins | — | 20 (bidirectional, JTAG-programmable OE per macrocell) |
| Programming Method | — | EPROM (UV-erasable), via Altera programming hardware |