EP910ILC-12 vs EP910IDC-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-12 sa pamamagitan ng Intel at EP910IDC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP910ILC-12 EP910IDC-15
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Product Type Classic EPLD (Erasable Programmable Logic Device) —
Family Altera EP910 Classic EPLD Classic EPLD
Number of Macrocells 24 —
Usable Gates 450 (typical) —
Propagation Delay (tPD) 12 ns (max) —
Supply Voltage (VCC) 4.75 V to 5.25 V 5 V
Nominal Supply 5 V —
Memory Technology UV-erasable CMOS EPROM —
Packhaging 28-PLCC (J-Lead, 11.5 x 11.5 mm) 40-pin CDIP (Ceramic DIP, through-hole)
Uri ng Pagpapasok Surface Mount —
Temperature na Operasyon -40 °C to +85 °C (industrial grade, 'I' suffix) —
Configuration Storage Non-volatile EPROM (instant-on) —
Programming Method Altera programming algorithm (serial/parallel master-slave) —
Level ng MSL [DATA_NEEDED: MSL level] —
Tindminan RoHS [DATA_NEEDED: RoHS status] non_compliant (ceramic DIP contains lead)
Bilang ng Pins 28 —
Feedback Paths 16 dedicated —
Manufacturer — Altera (now Intel PSG)
Equivalent Gates — 450
Macrocells — 24
Flip-Flops — 48
Pin-to-Pin Delay (tPD) — 15 ns
Maximum Frequency (fCNT) — 66.6 MHz
Terminal Count — 40
Terminal Form — Through-Hole
Temperature Grade — Commercial (0C to +70C)
Programmable Security Bit — Yes
On-board Test Circuitry — Yes
Logic Type — UV Erasable EPROM-based
I/O Pins — 24
Dedicated Inputs — 10
Programming Technology — EPROM (UV-erasable)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita