EP910ILC-15 vs EP910ILC-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-15 sa pamamagitan ng Intel at EP910ILC-15N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP910ILC-15N - 450 Gate 24-Macrocell Classic CPLD, 15ns, 5V, 44-PLCC | Altera
EP910ILC-15N ObsoletePagsanggunian na paghahambing
| Parametro | EP910ILC-15 | EP910ILC-15N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Classic EPLD | Classic |
| Series | EP910 | — |
| Logic Gates | 450 | 450 |
| Macrocells | 24 | — |
| User I/O Pins | 36 | 36 |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 83.33 MHz | 66.6 MHz |
| Volte ng Pagbibigay | 5 V | — |
| Uri ng Memory | EPROM (UV-erasable) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0 C to +70 C (commercial) |
| Packhaging | 44-pin PLCC (J-lead) | PLCC-44 (J-lead, surface mount) |
| Uri ng Pagpapasok | Surface Mount (SMT) | Surface Mount |
| Propagation Class | -15 speed grade | — |
| Storage Condition | Dry cabinet, humidity-controlled | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 24 |
| Maximum Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Dedicated Input Pins | — | 16 |
| Process Technology | — | CMOS EPROM (one-time programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming | — | EPROM / JTAG (Classic EP-series) |