EP910ILC-25 vs EP910IPC-12 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-25 sa pamamagitan ng Intel at EP910IPC-12 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-25 | EP910IPC-12 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | EP910 Classic EPLD | Classic EPLD |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS EPLD (UV-erasable or OTP) |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Packhaging | 44-pin JLCC (windowed ceramic) | 40-pin PDIP |
| Uri ng Pagpapasok | Surface Mount | Through Hole |
| Temperature na Operasyon | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Volte ng Pagbibigay | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| Tindminan RoHS | non_compliant (ceramic windowed package) | [DATA_NEEDED: RoHS status] |
| Katayuan ng Lifecycle | Obsolete - last time buy was late 1990s | — |
| Usable Gates | — | 450 |
| Maximum Operating Frequency (fMAX) | — | 76.9 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 12 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Dedicated Inputs | — | 10 |
| I/O Pins | — | 24 |
| Programming Toolchain | — | MAX+PLUS II |
| Logic Capacity | — | Equivalent to ~24 PAL16V8s |