EP910JM-40 vs EP910ILC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910JM-40 sa pamamagitan ng Altera at EP910ILC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910JM-40 | EP910ILC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Logic Type | EPLD (UV-Erasable PAL-type) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Product Terms | 240 | — |
| External Clock Inputs | 2 | — |
| Propagation Delay (tPD) | 40 ns | 25 ns |
| Process Technology | CMOS | — |
| Packhaging | JLCC-28 (windowed ceramic, J-lead) | 44-pin JLCC (windowed ceramic) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - UV-windowed ceramic package typically not RoHS compliant] | non_compliant (ceramic windowed package) |
| Programming Method | UV erase + EPROM programmer | — |
| Temperature na Operasyon | 0C to +70C (commercial) [DATA_NEEDED: confirm grade] | -40C to +85C (industrial) |
| Family | — | EP910 Classic EPLD |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Technology | — | CMOS EPROM (UV-erasable) |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Volte ng Pagbibigay | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Katayuan ng Lifecycle | — | Obsolete - last time buy was late 1990s |