EP910LC44 vs EP910LC44-40 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC44 sa pamamagitan ng Altera at EP910LC44-40 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP910LC44 EP910LC44-40
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili Obsolete
Product Family Classic EPLD (EP910 Series) —
Manufacturer Altera Corporation (now Intel PSG) —
Device Type Erasable Programmable Logic Device (EPLD) —
Macrocells 24 24
Total Product Terms 240 —
Dedicated Inputs 12 12
I/O Pins 24 24 (bidirectional)
Total Input Pins 36 (12 dedicated + 24 I/O as inputs) —
Global Clock Inputs 2 2
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 5 V (nominal)
Propagation Delay (LC grade) [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data] —
Propagation Delay (LC-30 grade) 33 ns (per EP910LC44-30 verified data) —
Process Technology CMOS —
Packhaging 44-pin PLCC (J-leaded) 44-pin PLCC (Plastic Leaded Chip Carrier)
Temperature na Operasyon [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data] 0C to +70C (commercial)
Programming Method EPROM (erasable UV for ceramic; OTP for plastic PLCC) JEDEC file via LP6/MP9 or compatible programmer
Architecture AND-OR sum-of-products with programmable macrocell feedback —
Logic Compatibility TTL-compatible CMOS I/O TTL-compatible I/O
Tindminan RoHS [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: RoHS compliance]
Family — Altera Classic EPLD
Product Terms (Total) — 240
Total Inputs — 36
Propagation Delay (tPD) — 40 ns
Technology — CMOS, UV-erasable EPROM
Uri ng Pagpapasok — Surface Mount

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