EP910LC44 vs EP910LI-35BF Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC44 sa pamamagitan ng Altera at EP910LI-35BF sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP910LC44 - Classic EPLD, 24 Macrocells, 44-Pin PLCC | Intel / Altera
EP910LC44 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP910LC44 | EP910LI-35BF |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Product Family | Classic EPLD (EP910 Series) | — |
| Manufacturer | Altera Corporation (now Intel PSG) | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Total Product Terms | 240 | — |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Total Input Pins | 36 (12 dedicated + 24 I/O as inputs) | — |
| Global Clock Inputs | 2 | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (nominal) |
| Propagation Delay (LC grade) | [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data] | — |
| Propagation Delay (LC-30 grade) | 33 ns (per EP910LC44-30 verified data) | — |
| Process Technology | CMOS | — |
| Packhaging | 44-pin PLCC (J-leaded) | 44-pin PLCC (J-lead) |
| Temperature na Operasyon | [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data] | — |
| Programming Method | EPROM (erasable UV for ceramic; OTP for plastic PLCC) | EPROM/UV-erase programmer (Altera Classic algorithm) |
| Architecture | AND-OR sum-of-products with programmable macrocell feedback | — |
| Logic Compatibility | TTL-compatible CMOS I/O | — |
| Tindminan RoHS | [DATA_NEEDED: not stated in verified data] | — |
| Device Family | — | Altera Classic EPLD |
| Part Number Base | — | EP910 |
| Logic Density | — | 450 usable gates |
| Maximum Pin-to-Pin Delay (tpd) | — | 35 ns |
| Maximum Toggle Frequency (fmax) | — | 28.6 MHz |
| Hanay ng Temperature na Operasyon | — | Industrial (LI suffix) |
| Technology | — | CMOS, UV-erasable |
| Output Polarity Control | — | Programmable XOR per macrocell |
| Flip-Flop Type | — | Selectable D/T/JK/SR per macrocell |
| TTL Compatibility | — | 100% TTL emulation |
| Compliance / EOL Status | — | Obsolete - last-time buy exhausted; second-source via Rochester Electronics |