EP910LI-15 vs EP910LI-12 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LI-15 sa pamamagitan ng Altera at EP910LI-12 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LI-15 | EP910LI-12 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Product Type | Programmable Logic Device (PLD) | — |
| Device Family | Altera Classic EPLD | Altera Classic EPLD |
| Part Number | EP910LI-15 | — |
| Supply Voltage Range | 4.5 V to 5.5 V | — |
| Dedicated Inputs | 12 | — |
| Input/Output Lines | 24 | — |
| Total User-Signal Resources | 36 | — |
| Speed Grade | 15 ns | — |
| Hanay ng Temperature na Operasyon | -40 °C to +85 °C | — |
| Technology | CMOS | — |
| Packhaging | 44-terminal J-lead ceramic chip carrier (PQCC44) | 28-PLCC (windowed ceramic, J-Lead) |
| Package Pin Count | 44 terminals | — |
| Package Mounting | Surface Mount | — |
| Dielectric/Construction | Ceramic | — |
| Tindminan RoHS | unknown | non_compliant (ceramic windowed package) |
| REACH Status | unknown | — |
| AEC-Q100 Status | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Conflict Minerals Status | unknown | — |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 12 ns |
| Maximum Frequency (fMAX) | — | 76.9 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V typical) |
| I/O Pins | — | 24 |
| Inputs (with input registers) | — | 36 |
| Temperature na Operasyon | — | -40C to +85C (industrial) |
| Process Technology | — | 1.0-micron CMOS EPROM |
| Power Dissipation (typical) | — | 200 mW at 5 V |
| Programming Method | — | UV-erasable via windowed package |
| Logic Compatibility | — | TTL-compatible I/O |