EP910LI-15 vs EP910LI-12 比較
詳細並排比較 EP910LI-15 由 Altera 與 EP910LI-12 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LI-15 | EP910LI-12 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Product Type | Programmable Logic Device (PLD) | — |
| Device Family | Altera Classic EPLD | Altera Classic EPLD |
| Part Number | EP910LI-15 | — |
| Supply Voltage Range | 4.5 V to 5.5 V | — |
| Dedicated Inputs | 12 | — |
| Input/Output Lines | 24 | — |
| Total User-Signal Resources | 36 | — |
| Speed Grade | 15 ns | — |
| 工作溫度範圍 | -40 °C to +85 °C | — |
| Technology | CMOS | — |
| 封裝 | 44-terminal J-lead ceramic chip carrier (PQCC44) | 28-PLCC (windowed ceramic, J-Lead) |
| Package Pin Count | 44 terminals | — |
| Package Mounting | Surface Mount | — |
| Dielectric/Construction | Ceramic | — |
| RoHS 狀態 | unknown | non_compliant (ceramic windowed package) |
| REACH Status | unknown | — |
| AEC-Q100 Status | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Conflict Minerals Status | unknown | — |
| Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 12 ns |
| Maximum Frequency (fMAX) | — | 76.9 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V typical) |
| I/O Pins | — | 24 |
| Inputs (with input registers) | — | 36 |
| 工作溫度 | — | -40C to +85C (industrial) |
| Process Technology | — | 1.0-micron CMOS EPROM |
| Power Dissipation (typical) | — | 200 mW at 5 V |
| Programming Method | — | UV-erasable via windowed package |
| Logic Compatibility | — | TTL-compatible I/O |