EP910LI-35H vs EP910LI-30T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LI-35H sa pamamagitan ng Intel at EP910LI-30T sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LI-35H | EP910LI-30T |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Altera Classic EPLD (EP910) | Altera Classic EPLD |
| Logic Capacity | 900 usable gates | — |
| Macro Cells | 24 | — |
| Speed Grade (tPD) | 35 ns | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCC) | 5 V (±10%) | — |
| Technology | CMOS, UV-erasable EPROM cell | CMOS, UV-erasable |
| Packhaging | 44-pin PLCC (J-lead) | PQCC-44 (J-lead) |
| Temperature na Operasyon | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Active Supply Current | [DATA_NEEDED: ICC] | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS] |
| Lead-Free Option (H suffix) | Yes (H suffix) | — |
| Number of Macrocells | — | 24 |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 30 ns |
| Clock-to-Output (tCO) | — | [DATA_NEEDED: tCO] |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX] |
| Dedicated Inputs | — | 10 |
| I/O Pins | — | 24 |
| Volte ng Pagbibigay | — | [DATA_NEEDED: VCC] |
| Programming Method | — | EPROM (UV-erasable) via Altera Logic Programmer |
| Lead-Free | — | [DATA_NEEDED: Lead-free] |