EP910PC-30T vs EP910PC-30 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910PC-30T sa pamamagitan ng Intel at EP910PC-30 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910PC-30T | EP910PC-30 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Usable Gates | 900 | ~450 |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | 12 bidirectional |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Clock Frequency (fCNT) | 33.3 MHz | — |
| Process Technology | CMOS | — |
| Volte ng Pagbibigay | 5 V (TTL compatible) | — |
| Packhaging | PDIP-40 (Plastic DIP) | PDIP-40 (plastic DIP, 0.6 inch) |
| Uri ng Pagpapasok | Through-Hole | Through-hole DIP |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Logic Compatibility | 100% TTL emulation | — |
| Programming | MAX+PLUS II / UV-erasable | — |
| Pin-to-Pin Propagation Delay (tPD) | — | 30 ns |
| Maximum Counter Frequency (fCNT) | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 5 V ±10% |
| Logic Inputs | — | 36 dedicated |
| Logic Array Blocks (LABs) | — | 4 |
| Programming Technology | — | UV-erasable EPROM cell |
| TTL Emulation | — | 100% TTL-compatible |
| Power Dissipation | — | [DATA_NEEDED: power dissipation mW] |
| Tindminan RoHS | — | Non-compliant (contains lead, PDIP package) |