EP910PI-25 vs EP910PI-30T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910PI-25 sa pamamagitan ng Intel at EP910PI-30T sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910PI-25 | EP910PI-30T |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 10 |
| I/O Pins | 24 | — |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 40 MHz | — |
| Supply Voltage (VCC) | 5 V nominal | 4.75 V to 5.25 V (5 V nominal) |
| Process Technology | 5 V CMOS (EPROM-based) | — |
| Packhaging | PDIP-40 (Plastic DIP) | — |
| Bilang ng Pin | 40 | — |
| Uri ng Pagpapasok | Through-Hole | Through-Hole |
| Temperature na Operasyon | 0C to +70C (commercial) | -40 C to +85 C (industrial) |
| Programmability | UV-erasable (windowed) / one-time-programmable | — |
| Tindminan RoHS | Non-compliant (PDIP package) | [DATA_NEEDED: RoHS status] |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 480 |
| Propagation Delay (tPD) | — | 30 ns |
| Register (Clock-to-Output) Delay | — | 20 ns |
| Technology | — | CMOS, UV-erasable (windowed ceramic) |
| Package Type | — | 40-pin PDIP (ceramic windowed) |
| Programming | — | Altera Classic device programmer / MAX+PLUS II flow |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |