EPC1064VPC8 vs EPC1604PC8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC1064VPC8 sa pamamagitan ng Altera at EPC1604PC8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC1064VPC8 | EPC1604PC8 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Uri ng Memory | OTP Configuration PROM (anti-fuse) | Serial Configuration EPROM (CMOS, UV-erasable) |
| Memory Organization | 64K x 1 (65 kb) | — |
| Interface | Serial (Altera FPGA configuration) | 4-pin serial (nCS, DCLK, DATA, OE) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| Programmable Type | OTP (One-Time-Programmable) | — |
| Packhaging | 8-Pin PDIP (Through-Hole) | 8-pin PDIP (DIP-8), through-hole, in-line |
| Package Dimensions | 0.300 inch (7.62 mm) PDIP | — |
| Uri ng Pagpapasok | Through-Hole | — |
| Target FPGAs | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Series | EPC1 | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (Commercial) |
| Access Time / Clock | [DATA_NEEDED: configuration clock frequency] | — |
| Program/Erase Cycles | 1 (OTP) | — |
| Tindminan RoHS | Non-compliant (per distributor data) | Unknown (legacy through-hole PDIP part) |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Supplier Device Package | 8-PDIP | — |
| Density | — | 64 Kbit (64K x 1) |
| Maximum Access Time | — | 75 ns |
| Supply Voltage (Vsup) | — | 4.75 V to 5.25 V (5 V nominal); 3.3 V operation supported |
| Maximum Supply Voltage | — | 5.25 V |
| Supply Voltage (3.3 V mode) | — | 3.0 V to 3.6 V |
| Standby Current | — | Near-zero after configuration completes |
| Active Configuration Current | — | Low (CMOS process) |
| Number of Terminals | — | 8 |
| Package Style | — | IN-LINE, RECTANGULAR |
| Compatibility | — | Altera FLEX-class SRAM-based FPGAs (FLEX 8000, FLEX 10K) |
| Programming Method | — | Altera programming hardware; UV-erasable window (PC suffix variant) |