EPC1064VPC8 vs EPC1604PC8 比較
詳細並排比較 EPC1064VPC8 由 Altera 與 EPC1604PC8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1064VPC8 | EPC1604PC8 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | OTP Configuration PROM (anti-fuse) | Serial Configuration EPROM (CMOS, UV-erasable) |
| Memory Organization | 64K x 1 (65 kb) | — |
| 介面 | Serial (Altera FPGA configuration) | 4-pin serial (nCS, DCLK, DATA, OE) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| Programmable Type | OTP (One-Time-Programmable) | — |
| 封裝 | 8-Pin PDIP (Through-Hole) | 8-pin PDIP (DIP-8), through-hole, in-line |
| Package Dimensions | 0.300 inch (7.62 mm) PDIP | — |
| 安裝類型 | Through-Hole | — |
| Target FPGAs | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Series | EPC1 | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (Commercial) |
| Access Time / Clock | [DATA_NEEDED: configuration clock frequency] | — |
| Program/Erase Cycles | 1 (OTP) | — |
| RoHS 狀態 | Non-compliant (per distributor data) | Unknown (legacy through-hole PDIP part) |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Supplier Device Package | 8-PDIP | — |
| Density | — | 64 Kbit (64K x 1) |
| Maximum Access Time | — | 75 ns |
| Supply Voltage (Vsup) | — | 4.75 V to 5.25 V (5 V nominal); 3.3 V operation supported |
| Maximum Supply Voltage | — | 5.25 V |
| Supply Voltage (3.3 V mode) | — | 3.0 V to 3.6 V |
| Standby Current | — | Near-zero after configuration completes |
| Active Configuration Current | — | Low (CMOS process) |
| Number of Terminals | — | 8 |
| Package Style | — | IN-LINE, RECTANGULAR |
| Compatibility | — | Altera FLEX-class SRAM-based FPGAs (FLEX 8000, FLEX 10K) |
| Programming Method | — | Altera programming hardware; UV-erasable window (PC suffix variant) |