EPC1213LC20 vs EPC1213PC8 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC1213LC20 sa pamamagitan ng Intel at EPC1213PC8 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC1213LC20 EPC1213PC8
Brand Intel Altera
Kategorya EEPROM Memory ICs
Katayuan ng Lifecycle Obsolete Obsolete
Uri ng Memory OTP Configuration PROM (Flash-based) OTP Configuration PROM (EEPROM cell)
Laki ng Memory 212 Kbit 212 Kbit
Interface Serial (Altera FPGA configuration protocol) Serial (4-wire: nCS, DCLK, DATA, OE)
Maximum Configuration Clock 6 MHz —
Supply Voltage (Core) 5.0 V —
I/O Voltage Tolerance 3.3 V / 5.0 V —
Programmability One-Time Programmable (OTP) via IEEE 1149.1 JTAG One-Time Programmable (OTP)
In-System Programmability Yes (5.0 V and 3.3 V ISP) —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX —
Compression Support Yes (FPGA decompresses bitstream during load) —
Temperature na Operasyon 0C to +70C (Commercial) 0 °C to +70 °C (Commercial)
Packhaging 20-PLCC (J-lead, 9x9 mm) 8-Pin PDIP (R-PDIP-T8)
Package Code QCCJ —
Uri ng Pagpapasok Surface Mount Through-Hole
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] Compliant (post-lead-free Altera revision)
Configuration Mode Supported — FLEX/APEX FPP / PS serial
Maksimum na Taktiko ng Oras — 6 MHz
Volte ng Pagbibigay — 3.0 V to 3.6 V
Programming Standard — IEEE Std 1532 / Jam STAPL
Standby Current — < 50 µA typical
Bilang ng Pin — 8
Lead-Free — Yes
JEDEC Package Code — R-PDIP-T8

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