EPC1441TC32 vs EPC1441LI20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC1441TC32 sa pamamagitan ng Altera at EPC1441LI20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC1441TC32 | EPC1441LI20 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Uri ng Memory | OTP Configuration PROM (flash-based) | OTP Configuration PROM (PROM) |
| Laki ng Memory | 440 Kbit (55000 byte) | — |
| Programmability | One-Time Programmable (OTP) | — |
| Volte ng Pagbibigay | 3.3 V / 5.0 V | 3.3 V |
| Internal Oscillator | 16.7 MHz | — |
| In-System Programming | IEEE 1149.1 JTAG, 3.3 V / 5.0 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Configuration Modes | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous | — |
| Daisy Chain Support | Yes | — |
| Packhaging | 32-TQFP (7 mm x 7 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Temperature na Operasyon | Commercial (0C to +70C) | -40 C to +85 C (industrial) |
| Uri ng Pagpapasok | Surface Mount | — |
| Terminal Form | Gull Wing | — |
| Terminal Pitch | 0.8 mm | — |
| Level ng MSL | 3 (168 hours) | [DATA_NEEDED: MSL rating] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - datasheet not yet verified] | [DATA_NEEDED: RoHS compliance status] |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Configuration Interface | — | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Pin Pitch | — | 1.27 mm |
| Programming Method | — | One-Time-Programmable via Altera programming hardware |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |