EPC16QC100N vs EPC16QC100-TAAC80 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC16QC100N sa pamamagitan ng Altera at EPC16QC100-TAAC80 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC16QC100N EPC16QC100-TAAC80
Brand Altera Altera
Kategorya Memory ICs Memory ICs
Katayuan ng Lifecycle Obsolete Obsolete
Laki ng Memory 16 Mbit (16,777,216 bits) —
Programmable Type In System Programmable —
Configuration Clock Frequency 33 MHz max —
On-Chip Decompression Yes (supports compressed bitstreams) —
Supply Voltage (VCC) 3.0 V to 3.6 V 3.3 V
Access Time 90 ns typical —
Flash Read Bandwidth 160 Mbps (16-bit DQ at 10 MHz) —
Configuration Interface FPP / PS / AS via dedicated FPGA pins —
JTAG (IEEE 1149.1) ISP Supported —
Temperature na Operasyon 0 C to 70 C -40C to +85C (industrial)
Packhaging 100-pin PQFP (20 x 14 mm) 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm
Uri ng Pagpapasok Surface Mount Surface Mount
Lead Free Yes (per datasheet) —
Packaging Tray —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K
Uri ng Memory — Flash (non-volatile configuration)
Memory Density — 16 Mbit
Configuration Modes — FPP, PS, AS, JTAG
Data Compression — Yes (built-in, 30-55% file size reduction)
I/O Voltage Tolerance — 1.8 V / 2.5 V / 3.3 V / 5 V
JTAG Support — IEEE 1149.1 boundary scan, in-system programmable
Package Code — QC100
Packaging Style — Tape and Reel (TAAC80 suffix)
Configuration Controller — Internal (integrated with flash array)
Bilang ng Pin — 100

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