EPC16QC100N vs EPC16QC100-TAAC80 对比

详细并排对比 EPC16QC100N 出自 Altera 和 EPC16QC100-TAAC80 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC16QC100N EPC16QC100-TAAC80
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $24.10 $25.20
存储容量 16 Mbit (16,777,216 bits) —
Programmable Type In System Programmable —
Configuration Clock Frequency 33 MHz max —
On-Chip Decompression Yes (supports compressed bitstreams) —
Supply Voltage (VCC) 3.0 V to 3.6 V 3.3 V
Access Time 90 ns typical —
Flash Read Bandwidth 160 Mbps (16-bit DQ at 10 MHz) —
Configuration Interface FPP / PS / AS via dedicated FPGA pins —
JTAG (IEEE 1149.1) ISP Supported —
工作温度 0 C to 70 C -40C to +85C (industrial)
封装 100-pin PQFP (20 x 14 mm) 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm
安装类型 Surface Mount Surface Mount
Lead Free Yes (per datasheet) —
Packaging Tray —
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K
存储器类型 — Flash (non-volatile configuration)
Memory Density — 16 Mbit
Configuration Modes — FPP, PS, AS, JTAG
Data Compression — Yes (built-in, 30-55% file size reduction)
I/O Voltage Tolerance — 1.8 V / 2.5 V / 3.3 V / 5 V
JTAG Support — IEEE 1149.1 boundary scan, in-system programmable
Package Code — QC100
Packaging Style — Tape and Reel (TAAC80 suffix)
Configuration Controller — Internal (integrated with flash array)
引脚数量 — 100

数据手册与资源

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