EPC1LC20-WCEC52 vs EPC1LC20-W Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC1LC20-WCEC52 sa pamamagitan ng Altera at EPC1LC20-W sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC1LC20-WCEC52 | EPC1LC20-W |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Uri ng Memory | OTP Configuration PROM (Anti-fuse) | OTP (One-Time Programmable) Configuration PROM |
| Laki ng Memory | 1 Mbit (1,048,576 bits) | 1 Mbit |
| Organisasyon | 212,942 x 1 bit | — |
| Interface | Serial (Altera FPP/PS configuration protocol) | Altera serial configuration (DCLK / DATA / nCONFIG / nSTATUS) |
| Configuration Clock (DCLK) | 8 MHz maximum | 8 MHz maximum |
| Supply Voltage (VCC) | 3.3 V | — |
| I/O Voltage Tolerance | 5.0 V (FPGA interface) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Programmability | One-Time Programmable (OTP) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | — |
| Packhaging | 20-pin PLCC (J-lead, through-hole, 9x9 mm) | 20-PLCC J-lead (9x9 mm) |
| Package Mounting | Through-hole (also accepts PLCC socket) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (Pb-free -W finish) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Compatible FPGA Families | Cyclone, Stratix, APEX, ACEX, MAX series | — |
| Programming Interface | JTAG (IEEE Std 1149.1) ISP | — |
| Bilang ng Pin | 20 | — |
| Katayuan ng Lifecycle | Obsolete (recommended replacement: EPCQ family or newer serial config devices) | — |
| Volte ng Pagbibigay | — | 3.3 V and 5.0 V |
| In-System Programming | — | Yes - IEEE 1149.1 (JTAG) ISP at 3.3 V / 5.0 V |
| Lead Finish | — | Pb-free (matte tin) - "-W" suffix |
| Daisy-Chain Support | — | Yes - multiple EPC1 / EPC2 devices cascade to program larger FPGAs |
| Compression Support | — | Yes - stores compressed Altera FPGA bitstreams |
| Hanay ng Temperature na Operasyon | — | [DATA_NEEDED: operating temperature range] |
| Programming Cycles | — | 1 (OTP) |
| Target FPGA Families | — | Cyclone, FLEX 6000 / 10K / 10KE, ACEX 1K, APEX 20K, Mercury |
| Uri ng Pagpapasok | — | Surface Mount (PLCC socket or direct solder) |