EPC21LC20 vs EPC27C32N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC21LC20 sa pamamagitan ng Intel at EPC27C32N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC21LC20 EPC27C32N
Brand Intel Altera
Kategorya Memory ICs FPGA & CPLD
Katayuan ng Lifecycle Aktibo Obsolete
Uri ng Memory Serial Configuration PROM (Flash-based, in-system programmable) Configuration EPROM (non-volatile)
Density 2 Mb (2,097,152 bits) 32 Mbit
Configuration Mode Supported Serial (PS) for Altera SRAM-based LUT FPGAs —
Maximum DCLK Frequency 10 MHz —
Access Time approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure] —
Programming Interface IEEE 1149.1 (JTAG) —
Program/Erase Endurance 100 cycles minimum [DATA_NEEDED: confirm from datasheet] —
Operating Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
Standby Current [DATA_NEEDED: ICCSB value] —
Active Read Current [DATA_NEEDED: ICC active current] —
Operating Temperature (commercial) 0 °C to +70 °C (LC suffix) —
Operating Temperature (industrial) [DATA_NEEDED: -40 to +85 °C for LI variant] —
Packhaging / Kaso 20-pin PLCC (J-lead, JEDEC MS-018) —
Uri ng Pagpapasok Surface Mount (PLCC socket or solder) Surface Mount (PLCC)
Level ng MSL [DATA_NEEDED: confirm moisture sensitivity level] —
Tindminan RoHS [DATA_NEEDED: confirm from Altera product page] [DATA_NEEDED: depends on date code; older N suffix often Pb-free]
Lead-Free (Pb-free) [DATA_NEEDED: confirm] —
Compatible FPGA Families ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT) —
JTAG Boundary-Scan Compliant Yes (IEEE Std 1149.1) —
Data Width 1 bit (serial DATA output) —
Configuration Interface — Serial (Altera Passive Serial / Active Serial / JTAG)
Volte ng Pagbibigay — [DATA_NEEDED: VCC nominal]
Supply Voltage Range — [DATA_NEEDED: VCC min/max]
Programmability — In-system programmable (IEEE 1532 / JTAG)
Packhaging — PLCC-20
Package Code Suffix — N = PLCC-20
Temperature na Operasyon — [DATA_NEEDED: industrial/commercial]
Multi-device Daisy-chain — Yes (page-mode supported)
Reconfiguration — Software-controllable / on-the-fly via JTAG
Lead-free — [DATA_NEEDED]
Family — EPC Enhanced Configuration Device
Compatible FPGA Targets — Altera Stratix, Cyclone, Arria, FLEX, ACEX series
Manufacturer — Intel (formerly Altera)

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