EPC21LC20 vs EPC27C32N 比較
詳細並排比較 EPC21LC20 由 Intel 與 EPC27C32N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC21LC20 | EPC27C32N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | Memory ICs | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| 記憶體類型 | Serial Configuration PROM (Flash-based, in-system programmable) | Configuration EPROM (non-volatile) |
| Density | 2 Mb (2,097,152 bits) | 32 Mbit |
| Configuration Mode Supported | Serial (PS) for Altera SRAM-based LUT FPGAs | — |
| Maximum DCLK Frequency | 10 MHz | — |
| Access Time | approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure] | — |
| Programming Interface | IEEE 1149.1 (JTAG) | — |
| Program/Erase Endurance | 100 cycles minimum [DATA_NEEDED: confirm from datasheet] | — |
| Operating Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| Standby Current | [DATA_NEEDED: ICCSB value] | — |
| Active Read Current | [DATA_NEEDED: ICC active current] | — |
| Operating Temperature (commercial) | 0 °C to +70 °C (LC suffix) | — |
| Operating Temperature (industrial) | [DATA_NEEDED: -40 to +85 °C for LI variant] | — |
| 封裝 / 外殼 | 20-pin PLCC (J-lead, JEDEC MS-018) | — |
| 安裝類型 | Surface Mount (PLCC socket or solder) | Surface Mount (PLCC) |
| MSL 等級 | [DATA_NEEDED: confirm moisture sensitivity level] | — |
| RoHS 狀態 | [DATA_NEEDED: confirm from Altera product page] | [DATA_NEEDED: depends on date code; older N suffix often Pb-free] |
| Lead-Free (Pb-free) | [DATA_NEEDED: confirm] | — |
| Compatible FPGA Families | ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT) | — |
| JTAG Boundary-Scan Compliant | Yes (IEEE Std 1149.1) | — |
| Data Width | 1 bit (serial DATA output) | — |
| Configuration Interface | — | Serial (Altera Passive Serial / Active Serial / JTAG) |
| 供應電壓 | — | [DATA_NEEDED: VCC nominal] |
| Supply Voltage Range | — | [DATA_NEEDED: VCC min/max] |
| Programmability | — | In-system programmable (IEEE 1532 / JTAG) |
| 封裝 | — | PLCC-20 |
| Package Code Suffix | — | N = PLCC-20 |
| 工作溫度 | — | [DATA_NEEDED: industrial/commercial] |
| Multi-device Daisy-chain | — | Yes (page-mode supported) |
| Reconfiguration | — | Software-controllable / on-the-fly via JTAG |
| Lead-free | — | [DATA_NEEDED] |
| Family | — | EPC Enhanced Configuration Device |
| Compatible FPGA Targets | — | Altera Stratix, Cyclone, Arria, FLEX, ACEX series |
| Manufacturer | — | Intel (formerly Altera) |