EPC2LC20EM vs EPC2LC20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LC20EM sa pamamagitan ng Intel at EPC2LC20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC2LC20EM EPC2LC20
Brand Intel Altera
Kategorya FPGA & CPLD Memory ICs
Katayuan ng Lifecycle Aktibo NRND
Uri ng Memory Serial Configuration Memory (EPC2 family) Non-volatile configuration PROM
Density 1.6 Mbit —
Interface Serial / Parallel configuration, JTAG ISP —
Operating Voltage (Core) 3.3 V —
Programming Mode In-system programmable via JTAG (IEEE 1149.1) —
Package Type PLCC-20 (plastic) —
Temperature na Operasyon -40C to +85C (industrial) -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet]
Tindminan RoHS [DATA_NEEDED: lead-free / RoHS classification] Non-Compliant (original Altera Pb-containing part)
Configuration Compatibility Stratix, Cyclone, APEX, ACEX, FLEX, MAX, Excalibur, HardCopy —
Data Retention [DATA_NEEDED: minimum data-retention years] —
Program/Erase Cycles [DATA_NEEDED: minimum endurance cycles] —
Access Time [DATA_NEEDED: tOE / tAA in ns] —
Uri ng Pagpapasok Surface Mount (PLCC socket or solder) Surface Mount
Level ng MSL [DATA_NEEDED: moisture sensitivity level] —
Manufacturer Family EPC2 Enhanced Configuration Device —
Laki ng Memory — 1.6 Mbit
Configuration Interface — Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE
Programming Interface — IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant
Supply Voltage VCC — 3.0 V to 3.6 V (3.3-V operation)
ISP Voltage Range — 5.0 V or 3.3 V
Supported FPGA Families — ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000
Cascade Support — Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams
Packhaging — 20-pin PLCC (J-lead, 9x9 mm)
Lead-Free Version — EPC2LC20N available as lead-free equivalent
Programming Support — Altera Programming Unit (APU), Quartus II, JTAG programmer
Boundary-Scan — IEEE 1149.1 compliant, 8-bit or 16-bit JTAG

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