EPC2LI20NGA vs EPC2LC20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LI20NGA sa pamamagitan ng Altera at EPC2LC20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2LI20NGA | EPC2LC20 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | Memory ICs |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Laki ng Memory | 1.6 Mbit | 1.6 Mbit |
| Fungsi | In-System Programmable Configuration PROM | — |
| Target Device | SRAM-based LUT FPGAs | — |
| Packhaging | 20-PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Hanay ng Temperature na Operasyon | -40C to +85C (Industrial) | — |
| Volte ng Pagbibigay | 3.0 V to 3.6 V (3.3 V typical) | — |
| Configuration Interface | Passive Serial / Passive Parallel | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Method | In-System via JTAG (IEEE 1149.1) | — |
| Cascadable | Yes (DATA, DCLK chain) | — |
| Tindminan RoHS | Compliant (lead-free 'G' suffix) | Non-Compliant (original Altera Pb-containing part) |
| Uri ng Pagpapasok | Surface Mount / Thru-Hole Socket | Surface Mount |
| Lead-Free Termination | Yes (NiPdAu) | — |
| Process Technology | CMOS EEPROM | — |
| Manufacturer | Altera / Intel PSG | — |
| Datasheet Document | EPC2 datasheet (Altera) | — |
| Uri ng Memory | — | Non-volatile configuration PROM |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Temperature na Operasyon | — | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |