EPC2T32U-CAF48 vs EPC2T32N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC2T32U-CAF48 sa pamamagitan ng Altera at EPC2T32N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC2T32U-CAF48 EPC2T32N
Brand Altera Altera
Kategorya Memory ICs FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili Obsolete
Uri ng Memory Non-volatile flash configuration memory —
Memory Density 2 Mb (2097152 bits) —
Configuration Interface Altera FPP (8-bit) / PS (4-wire) / AS (serial) —
Maximum Configuration Clock (DCLK) 8 MHz —
Supply Voltage (VCC) 3.3 V (typical) —
I/O Tolerance 5 V tolerant —
Program/Erase Endurance 10,000 cycles per sector minimum —
Data Retention 20 years minimum —
Programming Interface IEEE 1149.1 (JTAG) / IEEE 1532 —
Packhaging 48-pin QFN (CAF suffix) 32-TQFP (7x7 mm)
Uri ng Pagpapasok Surface Mount Surface Mount
Temperature na Operasyon -40 C to +85 C (industrial grade, "U") 0 C to +70 C
Level ng MSL [DATA_NEEDED: MSL level] —
Lead-Free Finish Yes (CAF suffix indicates lead-free) —
Tindminan RoHS Compliant Compliant (lead-free)
Supported FPGA Families Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur —
Laki ng Memory — 1.6 Mbit
Programmable Type — In System Programmable (Flash)
Configuration Mode — Passive Serial (PS) / JTAG ISP
Maksimum na Taktiko ng Oras — 10 MHz
Supply Voltage - VCCINT — 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply)
Interface — Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Compliance — IEEE 1149.1 (boundary-scan, ISP)
Bilang ng Pin — 32
Sector Architecture — Flash with built-in CRC
Cascade Support — Yes (multi-device daisy-chain)
CONF_DONE / nSTATUS Drive — Open-drain

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