EPC2TC32V vs EPC2TC32 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2TC32V sa pamamagitan ng Altera at EPC2TC32 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2TC32V | EPC2TC32 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Uri ng Memory | In-System Programmable Configuration PROM | — |
| Laki ng Memory | 1.6 Mbit | 1.6 Mb |
| Organisasyon | x8 (configurable serial/parallel output) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| I/O Voltage Tolerance | 5 V tolerant | — |
| Interface | Passive Serial (PS), Passive Parallel Async (PPA), Passive Parallel Sync (PPS), JTAG ISP | Serial, JTAG, FPP, PS |
| Programming Method | In-system via JTAG (IEEE 1149.1) | — |
| Cascadable | Yes (multiple EPC2s daisy-chain for larger bitstreams) | — |
| Temperature na Operasyon | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Packhaging | 32-pin TQFP (7 mm x 7 mm) | 32-TQFP (7x7 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Compatible FPGA Families | APEX 20K, APEX II, FLEX 10K/10KE, ACEX 1K, Cyclone (original), Stratix (original) | — |
| Configuration Hand-shake Pins | nCONFIG, nSTATUS, CONF_DONE, DCLK | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Yes | — |
| Device Type | — | In-System Programmable Configuration PROM |
| Volte ng Pagbibigay | — | 3.3 V |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| Bilang ng Pin | — | 32 |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Modes | — | FPP, PS, JTAG |
| Internal Oscillator | — | Yes (DCLK generation) |
| Cascade Support | — | Yes (via nCS and RDYnBUSY) |
| Memory Technology | — | CMOS non-volatile |