EPC4QC100 vs EPC4Q100N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC4QC100 sa pamamagitan ng Altera at EPC4Q100N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC4QC100 EPC4Q100N
Brand Altera Intel
Kategorya Memory ICs FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Fungsi In-System Programmable Configuration PROM for FPGAs —
Uri ng Memory Flash Flash (NOR, Enhanced Configuration Device)
Laki ng Memory 4 Mb 4 Mbit (512 Kbyte)
Supply Voltage (Core and I/O) 3.3 V —
Maximum Configuration Clock 66 MHz —
Interface Serial / Fast Passive (Altera FPGAs) —
In-System Programmability IEEE Std. 1532 compliant —
JTAG Support Yes (boundary scan + ISP via Jam STAPL) IEEE 1149.1 compliant
nINIT_CONF Pin Yes (triggers FPGA configuration via private JTAG instruction) —
Packhaging 100-pin PQFP (20x14 mm) 100-pin PQFP
Temperature na Operasyon 0C to +70C (commercial) -40 C to +85 C (industrial)
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS unknown —
Lead-Free unknown —
Compatible FPGA Families Stratix, Cyclone, APEX, Mercury, ACEX —
Configuration Interface — Serial (FLEX) / Parallel / JTAG ISP
Volte ng Pagbibigay — 3.3 V
Program/Erase Cycles — [DATA_NEEDED: minimum endurance in cycles]
In-System Programmable — Yes
Target FPGA Families — Cyclone, Stratix, APEX, Mercury, ACEX
Data Width (parallel mode) — 8-bit
Lead-Free / RoHS — [DATA_NEEDED: per lot]
Status — Not Recommended for New Designs (NRND)
Configuration Schemes — Active Serial (AS) / Active Parallel (AP) / Passive Serial (PS)
Level ng MSL — [DATA_NEEDED: per JEDEC J-STD-020]

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