EPC4QI100N vs EPC8QI100N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC4QI100N sa pamamagitan ng Altera at EPC8QI100N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPC4QI100N - 4Mb In-System Programmable FPGA Config PROM | Altera (Intel)
EPC4QI100N ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | EPC4QI100N | EPC8QI100N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | EEPROM |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Presyo ng Yunit (USD) | $10.40 | — |
| Uri ng Memory | In-System Programmable Configuration PROM (NOR flash) | — |
| Laki ng Memory | 4 Mbit (4,194,304 bits) | 8 Mbit (8,388,608 bits) |
| Programmable Type | In System Programmable (ISP via JTAG) | In System Programmable (Flash) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
| Interface | Altera serial (x1) configuration + JTAG | — |
| Configuration Clock DCLK | [DATA_NEEDED: DCLK maximum frequency] | — |
| Active Supply Current (ICC active) | [DATA_NEEDED: ICC active typical value] | — |
| Standby Supply Current | [DATA_NEEDED: ICC standby typical value] | — |
| Temperature na Operasyon | -40C to +85C (industrial) | -40 °C to +85 °C (Industrial) |
| Storage Temperature | -65C to +150C | — |
| Packhaging | 100-pin PQFP (PowerPQFP, 20x14 mm) | 100-PQFP / 100-BQFP (20 x 14 mm) |
| Package Code | QI100 (PQFP-100, industrial) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| JTAG Standard | IEEE 1149.1 boundary-scan / ISP | — |
| Cascading | Supported (multi-device daisy chain) | — |
| Target FPGAs | Altera Cyclone, Cyclone II, Stratix series | — |
| Manufacturer | — | Altera (Intel) |
| Part Family | — | EPC8 (Enhanced Configuration) |
| Device Type | — | Configuration PROM for SRAM-based FPGAs |
| Configuration Interface | — | Altera serial (4-wire: DATA, DCLK, nCS, nINIT_CONF) |
| Maximum Configuration Clock | — | 50 MHz |
| On-Chip Decompression | — | Yes (Altera compression algorithm) |
| Bilang ng Pin | — | 100 |
| Lead-Free / RoHS | — | Yes (per distributor listings) |
| JTAG (IEEE 1149.1) ISP | — | Supported |
| Multi-Device Daisy-Chain | — | Supported |
| Target FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Packaging | — | Tray |