EPC8820ARI208-4 vs EPC8820ARC208-3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC8820ARI208-4 sa pamamagitan ng Altera at EPC8820ARC208-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC8820ARI208-4 | EPC8820ARC208-3N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Device Type | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs | SRAM-based Programmable Logic Device (PLD) |
| Manufacturer | Altera (acquired by Intel in 2015) | — |
| Packhaging | 208-pin quad flat pack, RQFP (per ARI208 ordering field) | 208-pin RQFP (Plastic Quad Flat Pack) |
| Bilang ng Pin | 208 pins | — |
| Uri ng Pagpapasok | Surface mount | Surface Mount |
| Temperature Grade | Industrial (I designator in ARI208) | — |
| Speed Grade | -4 (Altera configuration speed grade) | — |
| Configuration Target | SRAM-based LUT FPGAs | — |
| Configuration Memory | Non-volatile configuration memory (EPC family characteristic) | — |
| In-System Programmability | Supported per EPC family documentation | — |
| Configuration Density | [DATA_NEEDED: configuration density in bits] | — |
| Volte ng Pagbibigay | [DATA_NEEDED: supply voltage range] | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface and control pin list] | — |
| Configuration Clock Source | [DATA_NEEDED: configuration clock source and maximum frequency] | — |
| Standby Current | [DATA_NEEDED: standby and active supply current] | — |
| Programming Endurance | [DATA_NEEDED: programming endurance cycles] | — |
| Data Retention | [DATA_NEEDED: configuration data retention] | — |
| MSL Rating | [DATA_NEEDED: moisture sensitivity level] | — |
| Package Body Dimensions | [DATA_NEEDED: package body size and lead pitch] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Lead Finish | [DATA_NEEDED: lead finish / lead-free (-N) suffix confirmation] | — |
| Family | — | FLEX 8000 |
| Usable Gates | — | 8,000 |
| Logic Cells / Logic Elements (LEs) | — | 672 |
| Maximum User I/O | — | 152 |
| Maximum Operating Frequency | — | 125 MHz |
| Propagation Delay (tpd) | — | 5.0 ns |
| Process Technology | — | 0.42 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 5.0 V nominal (4.75 V to 5.25 V) |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5 V (programmable I/O standard) |
| Operating Temperature Grade | — | Industrial (N suffix) |
| Configuration Method | — | SRAM, loaded via external EPROM or Altera serial configuration device (EPC1 / EPC1064 / EPC1213 / EPC1441) |
| Lead-Free | — | unknown |
| Configuration Device Compatibility | — | EPC1, EPC1064, EPC1213, EPC1441 (per manufacturer datasheet) |