EPC8Q100C vs EPC16QC100N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC8Q100C sa pamamagitan ng Altera at EPC16QC100N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC8Q100C EPC16QC100N
Brand Altera Altera
Kategorya FPGA & CPLD Memory ICs
Katayuan ng Lifecycle Huling Pagbili Obsolete
Memory Density 8 Mbit —
Device Family Enhanced Configuration Device (EPC8Q100 series) —
Configuration Interface Serial / Parallel (x8) slave mode FPP / PS / AS via dedicated FPGA pins
Volte ng Pagbibigay 3.3 V (typ) —
In-System Programming IEEE 1149.1 JTAG —
Packhaging 100-pin PQFP (20 x 14 mm) 100-pin PQFP (20 x 14 mm)
Temperature na Operasyon 0 C to +70 C (commercial, 'C' suffix) 0 C to 70 C
Cascade Support Up to 4 devices cascadable —
Supported FPGA Families Altera Cyclone, Cyclone II, Stratix, Stratix GX, Apex series ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Configuration Clock User-programmable internal oscillator —
Programming Cycles 100 minimum endurance cycles —
Programming Voltage 3.3 V in-system (no external VPP) —
Lead-Free / RoHS Lead-free per Altera/Intel Pb-free roadmap —
Uri ng Pagpapasok Surface Mount (PQFP) Surface Mount
Level ng MSL [DATA_NEEDED: MSL rating] —
Laki ng Memory — 16 Mbit (16,777,216 bits)
Programmable Type — In System Programmable
Configuration Clock Frequency — 33 MHz max
On-Chip Decompression — Yes (supports compressed bitstreams)
Supply Voltage (VCC) — 3.0 V to 3.6 V
Access Time — 90 ns typical
Flash Read Bandwidth — 160 Mbps (16-bit DQ at 10 MHz)
JTAG (IEEE 1149.1) ISP — Supported
Lead Free — Yes (per datasheet)
Packaging — Tray

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