EPC8Q100C vs EPC8Q100TBAC Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC8Q100C sa pamamagitan ng Altera at EPC8Q100TBAC sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC8Q100C EPC8Q100TBAC
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili Obsolete
Memory Density 8 Mbit —
Device Family Enhanced Configuration Device (EPC8Q100 series) —
Configuration Interface Serial / Parallel (x8) slave mode —
Volte ng Pagbibigay 3.3 V (typ) 3.3 V
In-System Programming IEEE 1149.1 JTAG —
Packhaging 100-pin PQFP (20 x 14 mm) QFP (TBAC suffix)
Temperature na Operasyon 0 C to +70 C (commercial, 'C' suffix) Industrial grade (TBAC suffix)
Cascade Support Up to 4 devices cascadable —
Supported FPGA Families Altera Cyclone, Cyclone II, Stratix, Stratix GX, Apex series —
Configuration Clock User-programmable internal oscillator —
Programming Cycles 100 minimum endurance cycles —
Programming Voltage 3.3 V in-system (no external VPP) —
Lead-Free / RoHS Lead-free per Altera/Intel Pb-free roadmap —
Uri ng Pagpapasok Surface Mount (PQFP) Surface Mount
Level ng MSL [DATA_NEEDED: MSL rating] —
Laki ng Memory — 8 Mb
Uri ng Memory — Flash (non-volatile configuration storage)
Access Time — 90 ns (approximately 10 MHz flash read)
Flash Read Bandwidth — Approximately 160 Mbps (16-bit DQ[] at 10 MHz)
Width ng Data Bus — 16-bit (DQ[])
Configuration Modes Supported — PS (Passive Serial), FPP (Fast Passive Parallel), PPA (Passive Parallel Asynchronous)
Programming Interface — IEEE 1532 / JTAG (in-system programmable)
Compatible FPGA Families — Altera Stratix, Cyclone, APEX, ACEX
Tindminan RoHS — [DATA_NEEDED: RoHS compliance status]
Lead-Free — [DATA_NEEDED: lead-free status]
Configuration Bitstream Compression — Supported (page-mode buffering)

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